1. Field of the Invention
The present general inventive concept relates to a semiconductor chip bonding apparatus, and more particularly, to an apparatus to bond a semiconductor chip on a lead frame or a substrate such as a PCB.
2. Description of the Related Art
Semiconductor devices are generally formed by a fabrication (FAB) process which forms electrical circuits on a silicon wafer, an electrical die sorting (EDS) process which tests electrical characteristics of semiconductor devices formed using a fabrication process, and a package process which encapsulates semiconductor devices with synthetic resins and individualizes semiconductor devices.
The package process of a semiconductor chip includes a sawing process which cuts a silicon wafer including circuits of a fine pattern into a chip unit of a predetermined size, a die bonding process which attaches chips to a lead frame, a wire bonding process which electrically connects chips to a lead frame using a conductive wire, a mold process which protects a conductive wire and chips from an external environment, and a forming process which bends an external lead of a lead frame into a predetermined shape.
The sawing process is a process which separates a wafer adhering to a tape into a chip unit of predetermined size using a diamond cutter. As a result of the sawing process, chips of the chip unit including circuits of a fine pattern are provided. The chips separated from the wafer by the sawing process are arranged and transferred to the lead frame. An adhesive such as epoxy spreads on the lead frame and the chips adhere to the lead frame by the adhesive. The chips are pressurized by a bonding load of a die bonder to fixedly adhere to the lead frame.